The formation of deep vias (e.g., vias that span and/or connect multiple levels of memory elements in a monolithic three dimensional memory array, also known as zias as will be explained below) conventionally requires the use of relatively expensive leading edge etch tools. Further, each of the mask steps involved in forming deep vias conventionally require the use of relatively expensive leading edge immersion lithography tools and techniques. Further, formation of deep vias using immersion lithography when feature sizes reach 32 nm to 15 nm will become even more costly and may not even be possible. Thus, what is needed are methods and apparatus that do not require the use of immersion lithography and that reduce the cost of manufacturing deep, submicron three-dimensional memory arrays that use deep vias.